The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 22, 2015

Filed:

Jul. 08, 2014
Applicant:

Fuji Electric Co., Ltd., Kawasaki, JP;

Inventors:

Takahiro Tamura, Nagano, JP;

Yasuhiko Onishi, Nagano, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kawasaki-Shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01); H01L 21/26 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7804 (2013.01); H01L 21/26 (2013.01); H01L 29/0634 (2013.01); H01L 29/1095 (2013.01); H01L 29/66712 (2013.01); H01L 29/7806 (2013.01);
Abstract

A super junction MOSFET is disclosed. The super junction MOSFET includes a plurality of mutually parallel pn junctions extending in a vertical direction on a first principal surface of an n-type semiconductor substrate; a parallel pn layer in which n-type drift regions and p-type partition regions, each sandwiched between the adjacent pn junctions, are disposed alternately in contact with each other; and an MOS gate structure on the first principal surface side of the parallel pn layer, wherein an n-type first buffer layer and second buffer layer are in contact in that order on the opposite principal surface side, and the impurity concentration of the first buffer layer is a concentration that is equal to or less than the same level as that of the impurity concentration of the n-type drift region.


Find Patent Forward Citations

Loading…