The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 22, 2015
Filed:
Jan. 11, 2013
Applicant:
Verisiti, Inc., Sanford, NC (US);
Inventor:
William Eli Thacker, III, Sanford, NC (US);
Assignee:
Verisiti, Inc., Sanford, NC (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 17/00 (2006.01); G11C 13/04 (2006.01); G06F 21/79 (2013.01); G06F 21/75 (2013.01); G06F 21/87 (2013.01); G11C 17/12 (2006.01);
U.S. Cl.
CPC ...
G06F 21/79 (2013.01); G06F 21/75 (2013.01); G06F 21/87 (2013.01); G11C 17/12 (2013.01);
Abstract
A ROM circuit includes a first N channel transistor having an output and having device geometry and device characteristics adapted to bias the output at a predetermined level when a P channel circuit is connected to the first N channel transistor; a pass transistor connected between the output and a data bus, the pass transistor connected to a word line, the word line adapted to turn ON the pass transistor when the word line is asserted; and the P channel circuit connected to the data bus and adapted to provide leakage current to charge a gate in the first N channel transistor when pass transistor is turned ON.