The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 15, 2015
Filed:
Dec. 08, 2014
Applicant:
Alpha and Omega Semiconductor Incorporated, Sunnyvale, CA (US);
Inventors:
Assignee:
Alpha and Omega Semiconductor Incorporated, Sunnyvale, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/336 (2006.01); H01L 29/78 (2006.01); H01L 29/40 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7813 (2013.01); H01L 29/407 (2013.01); H01L 29/66727 (2013.01); H01L 29/66734 (2013.01); H01L 29/7811 (2013.01); H01L 29/0638 (2013.01); H01L 29/0653 (2013.01); H01L 29/0878 (2013.01); H01L 29/41766 (2013.01); H01L 29/4236 (2013.01); H01L 29/456 (2013.01);
Abstract
A semiconductor device has a plurality of gate electrodes over a gate insulator layer formed in active trenches located in an active region of a semiconductor substrate. A first gate runner is formed in the semiconductor substrate and electrically connected to the gate electrodes. The first gate runner abuts and surrounds the active region. A second gate runner is connected to the first gate runner to make contact to a gate metal. A dielectric filled trench surrounds the first and second gate runners and the active region and a highly doped channel stop region is formed under the dielectric filled trench.