The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2015

Filed:

Nov. 21, 2014
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Caleb S. Leung, San Jose, CA (US);

Alan C. Wong, San Jose, CA (US);

Christopher J. Borrelli, Campbell, CA (US);

Yu Xu, Palo Alto, CA (US);

Yohan Frans, Palo Alto, CA (US);

Kun-Yung Chang, Los Altos Hills, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
H04L 7/002 (2013.01); H04L 7/0079 (2013.01);
Abstract

A method relates generally to a receiver. In such a method, a check of a clock and data recovery block of the receiver for a metastable state is performed. A phase input to a phase interpolator of the receiver is changed to cause the clock and data recovery block of the receiver to exit the metastable state within a time limit. To check for the metastable state, a phase difference in received data is determined, and the phase difference is determined to be less than a threshold for the clock and data recovery block being in the metastable state.


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