The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2015

Filed:

Mar. 06, 2014
Applicant:

Control Techniques Limited, Newtown, GB;

Inventors:

Andrew Jeremy Sykes, Bolton, GB;

Richard Mark Wain, Newtown, GB;

Colin Hargis, Oswestry, GB;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01); H02P 3/22 (2006.01); H02P 3/02 (2006.01); H02H 3/24 (2006.01); H02H 7/08 (2006.01); H02M 1/32 (2007.01); H02M 7/5387 (2007.01); H02M 1/00 (2007.01);
U.S. Cl.
CPC ...
H02P 3/02 (2013.01); H02H 3/24 (2013.01); H02H 7/0844 (2013.01); H02M 1/32 (2013.01); H02M 7/5387 (2013.01); H02M 2001/0006 (2013.01); H02P 2201/09 (2013.01);
Abstract

Apparatus for preventing output of an input signal is disclosed. The apparatus comprises a signal control unit comprising a signal buffering unit having an input and an output, the signal buffering unit arranged to receive an input signal and pass the input signal to the output when the signal buffering unit is powered, wherein a negative power supply terminal of the signal buffering unit is arranged to be supplied by a first power source having a voltage. The signal control unit also comprises a boost circuit arranged to boost the voltage of the first power source to a boosted voltage higher than the voltage of the first power source and supply either the voltage of the first power source or the boosted voltage to a positive power supply terminal of the signal buffering unit. The signal buffering unit is powered when the boosted voltage is supplied to the positive power supply terminal of the signal buffering unit and the signal buffering unit is not powered when voltage of the first power supply terminal is supplied to the positive power supply terminal of the signal buffering unit. Also disclosed is an apparatus for providing output voltages for driving a motor as well as a motor drive system.


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