The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2015

Filed:

Oct. 15, 2012
Applicant:

Anaren, Inc., East Syracuse, NY (US);

Inventor:

Chong Mei, Jamesville, NY (US);

Assignee:

Anaren, Inc., East Syracuse, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01P 5/12 (2006.01); H03F 3/68 (2006.01); H03F 1/02 (2006.01); H03F 1/56 (2006.01); H03F 3/60 (2006.01);
U.S. Cl.
CPC ...
H01P 5/12 (2013.01); H03F 1/0288 (2013.01); H03F 1/56 (2013.01); H03F 3/602 (2013.01); H03F 2200/387 (2013.01);
Abstract

The present invention is directed to a network that includes an output matching network coupled to an amplifier. The output matching network is configured to transform the at least one amplifier transistor output impedance to an output matching network impedance. A combiner network is coupled to the output matching network. The combiner network includes a first quarter wavelength transmission line coupled between the in-phase signal path and a combiner node. The combiner network further includes a bandwidth enhancement element coupled to the quadrature signal path at the combiner node and an impedance transformation element coupled between the combiner node and a load. The impedance transformation element is configured to substantially transform a combined output matching network impedance at the combiner node to the load impedance.


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