The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2015

Filed:

Nov. 01, 2011
Applicants:

Nathan Frederick Gardner, Sunnyvale, CA (US);

Werner Karl Goetz, Palo Alto, CA (US);

Michael Jason Grundmann, Sunnyvale, CA (US);

Melvin Barker Mclaurin, San Jose, CA (US);

John Edward Epler, San Jose, CA (US);

Michael David Camras, Sunnyvale, CA (US);

Aurelien Jean Francois David, San Francisco, CA (US);

Inventors:

Nathan Frederick Gardner, Sunnyvale, CA (US);

Werner Karl Goetz, Palo Alto, CA (US);

Michael Jason Grundmann, Sunnyvale, CA (US);

Melvin Barker McLaurin, San Jose, CA (US);

John Edward Epler, San Jose, CA (US);

Michael David Camras, Sunnyvale, CA (US);

Aurelien Jean Francois David, San Francisco, CA (US);

Assignee:

Koninklijke Philips N.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/32 (2010.01); H01L 33/00 (2010.01); H01L 33/02 (2010.01); H01L 33/22 (2010.01);
U.S. Cl.
CPC ...
H01L 33/32 (2013.01); H01L 33/007 (2013.01); H01L 33/0079 (2013.01); H01L 33/02 (2013.01); H01L 33/22 (2013.01); H01L 2924/0002 (2013.01);
Abstract

In embodiments of the invention, a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region is grown on a substrate. The substrate is a non-III-nitride material. The substrate has an in-plane lattice constant a. At least one III-nitride layer in the semiconductor structure has a bulk lattice constant aand [(|a−a|)/a]100% is no more than 1%. A surface of the substrate opposite the surface on which the semiconductor structure is grown is textured.


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