The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2015

Filed:

Jun. 19, 2012
Applicant:

Yasuhiko Ueda, Tokyo, JP;

Inventor:

Yasuhiko Ueda, Tokyo, JP;

Assignee:

PS4 LUXCO S.A.R.L., Luxembourg, LU;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8242 (2006.01); H01L 27/108 (2006.01); H01L 49/02 (2006.01); H01L 21/3213 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10894 (2013.01); H01L 27/10852 (2013.01); H01L 28/91 (2013.01); H01L 21/32134 (2013.01); H01L 21/32136 (2013.01); H01L 27/1085 (2013.01); H01L 27/10808 (2013.01); H01L 27/10814 (2013.01);
Abstract

A method of manufacturing a device includes: forming a fifth insulating film on a semiconductor substrate having a peripheral circuit region and a memory cell region in which a contact pad is formed; forming a second sacrifice film in the memory cell region in which the fifth insulating film is formed; forming, after the forming of the second sacrifice, a second insulating film in the peripheral circuit region on the semiconductor substrate to have a sidewall coming into contact with the second sacrifice film; forming a third insulating film to cover an upper surface of the second sacrifice film and an upper surface of the second insulating film; forming a hole penetrating through the third insulating film, the second sacrifice film and the fifth insulating film in the memory cell region; forming a lower electrode in the hole; and removing all of the second sacrifice film.


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