The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 08, 2015
Filed:
Jan. 31, 2011
Ryota Fukumoto, Kanagawa, JP;
Mitsuaki Osame, Kanagawa, JP;
Hiroyuki Miyake, Kanagawa, JP;
Yoshifumi Tanada, Kanagawa, JP;
Seiko Amano, Kanagawa, JP;
Ryota Fukumoto, Kanagawa, JP;
Mitsuaki Osame, Kanagawa, JP;
Hiroyuki Miyake, Kanagawa, JP;
Yoshifumi Tanada, Kanagawa, JP;
Seiko Amano, Kanagawa, JP;
Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken, JP;
Abstract
The present invention provides a semiconductor device in which a power line is not affected by noise due to a voltage drop caused by instantaneous high-current consumption in the buffer portion and that has no possibility that a logic portion malfunctions. In a case where the same potential is supplied to a logic portion and a buffer portion, by a method in which separate FPC terminals are used for the logic portion and the buffer portion, or by a method in which the FPC terminal is shared but a power line is branched for the logic portion and the buffer portion at a point close to the FPC terminal, a problem that the logic portion is affected by noise generated by a voltage drop of the power line due to instantaneous high-current consumption in the buffer portion can be prevented.