The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 08, 2015
Filed:
Jun. 18, 2009
Toshiki Shimizu, Hitachi, JP;
Akira Bando, Hitachi, JP;
Yusaku Otsuka, Hitachiota, JP;
Yasuhiro Kiyofuji, Hitachi, JP;
Eiji Kobayashi, Hitachinaka, JP;
Akihiro Onozuka, Hitachi, JP;
Satoru Funaki, Hitachi, JP;
Masakazu Ishikawa, Hitachi, JP;
Hideaki Masuko, Hitachi, JP;
Yusuke Seki, Hitachi, JP;
Wataru Sasaki, Hitachiota, JP;
Naoya Mashiko, Hitachiota, JP;
Akihiro Nakano, Iwaki, JP;
Shin Kokura, Hitachi, JP;
Shoichi Ozawa, Hitachi, JP;
Yu Iwasaki, Hitachi, JP;
Toshiki Shimizu, Hitachi, JP;
Akira Bando, Hitachi, JP;
Yusaku Otsuka, Hitachiota, JP;
Yasuhiro Kiyofuji, Hitachi, JP;
Eiji Kobayashi, Hitachinaka, JP;
Akihiro Onozuka, Hitachi, JP;
Satoru Funaki, Hitachi, JP;
Masakazu Ishikawa, Hitachi, JP;
Hideaki Masuko, Hitachi, JP;
Yusuke Seki, Hitachi, JP;
Wataru Sasaki, Hitachiota, JP;
Naoya Mashiko, Hitachiota, JP;
Akihiro Nakano, Iwaki, JP;
Shin Kokura, Hitachi, JP;
Shoichi Ozawa, Hitachi, JP;
Yu Iwasaki, Hitachi, JP;
HITACHI, LTD., Tokyo, JP;
HITACHI INDUSTRY & CONTROL SOLUTIONS, LTD., Ibaraki, JP;
Abstract
The present invention provides a duplexed operation processor control system that includes operation processors, an I/O device, and at least one communication path that couples the operation processors to the I/O device, and at least one communication path that couples the operation processors with each other. The duplexed operation processor control system switches over either of the operation processors to be a primary operation processor that executes a control operation for a control target, and the other to be a secondary operation processor that is in a stand-by state, and the secondary operation processor snoops control data synchronously when the primary operation processor acquires the control data from the control target.