The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 2015
Filed:
Oct. 31, 2014
Applicant:
Integrated Device Technology, Inc., San Jose, CA (US);
Inventors:
Chi-Lie Wang, Milpitas, CA (US);
Jason Mo, Fremont, CA (US);
Assignee:
INTEGRATED DEVICE TECHNOLOGY, INC., San Jose, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/08 (2006.01); H04L 12/841 (2013.01); H04L 12/935 (2013.01); H04L 12/823 (2013.01); H04L 12/879 (2013.01); H04L 12/801 (2013.01);
U.S. Cl.
CPC ...
H04L 47/286 (2013.01); H04L 47/32 (2013.01); H04L 49/3045 (2013.01); H04L 49/901 (2013.01); H04L 47/10 (2013.01);
Abstract
A method and apparatus for congestion and fault management with time-to-live (TTL) have been disclosed. Each time a packet is transferred into an Egress Port's Final Buffer, an associated TTL Timeout Counter will be loaded with a value. If the packet cannot be transferred out of the Egress Port before TTL timeout, it will be purged by removing a memory buffer pointer from the corresponding Virtual Output Queue (VOQ) entry.