The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2015

Filed:

May. 13, 2014
Applicant:

Phisontech Electronics (Malaysia) Sdn Bhd., Penang, MY;

Inventors:

Nyuk-How Thian, Sarawak, MY;

Chih-Jen Hsu, Hsinchu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 (2006.01); H03K 5/04 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03K 5/04 (2013.01); H03K 5/00006 (2013.01); H03M 1/66 (2013.01);
Abstract

A clock adjustment circuit and a digital to analog converting device are provided. The clock adjustment circuit includes a selection circuit and a frequency decreasing circuit. The selection circuit is configured to generate a first selection signal in response to a frequency of an output clock signal. The frequency decreasing circuit is coupled to the selection circuit, and configured to generate the output clock signal by reducing a frequency of an input clock signal by a first ratio in response to a first level of the first selection signal, and configured to generate the output clock signal by reducing the frequency of the input clock signal by a second ratio in response to a second level of the first selection signal, wherein the first ratio is different from the second ratio. Accordingly, complexity of a circuit is reduced.


Find Patent Forward Citations

Loading…