The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2015

Filed:

Aug. 30, 2013
Applicant:

Hrl Laboratories, Llc., Malibu, CA (US);

Inventors:

Andrea Corrion, Oak Park, CA (US);

Keisuke Shinohara, Thousand Oaks, CA (US);

Miroslav Micovic, Thousand Oaks, CA (US);

Rongming Chu, Newbury Park, CA (US);

David F. Brown, Woodland Hills, CA (US);

Adam J. Williams, Los Alamitos, CA (US);

Dean C. Regan, Simi Valley, CA (US);

Joel C. Wong, Los Angeles, CA (US);

Assignee:

HRL Laboratories, LLC, Malibu, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/20 (2006.01); H01L 29/40 (2006.01); H01L 21/765 (2006.01); H01L 21/285 (2006.01);
U.S. Cl.
CPC ...
H01L 29/402 (2013.01); H01L 21/28587 (2013.01); H01L 21/765 (2013.01); H01L 29/2003 (2013.01);
Abstract

A method of making a stepped field gate for an FET including forming a first set of layers having a passivation layer on a barrier layer of the FET and a first etch stop layer over the first passivation layer, forming additional sets of layers having alternating passivation layer and etch stop layers, successively removing portions of each set of layers using lithography and reactive ion etching to form stepped passivation layers and a gate foot, applying a mask having an opening defining an extent of a stepped field-plate gate, and forming the stepped field plate gate and the gate foot by plating through the opening in the mask.


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