The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 2015
Filed:
Dec. 19, 2012
Kaushal Sanghai, Somerville, MA (US);
Boris Lerner, Sharon, MA (US);
Michael G. Perkins, Edinburgh, GB;
John L. Redford, Arlington, MA (US);
Kaushal Sanghai, Somerville, MA (US);
Boris Lerner, Sharon, MA (US);
Michael G. Perkins, Edinburgh, GB;
John L. Redford, Arlington, MA (US);
Analog Devices, Inc., Norwood, MA (US);
Abstract
The present disclosure provides a memory interconnection architecture for a processor, such as a vector processor, that performs parallel operations. An example processor may include a compute array that includes processing elements; a memory that includes memory banks; and a memory interconnect network architecture that interconnects the compute array to the memory. In an example, the memory interconnect network architecture includes a switch-based interconnect network and a non-switch based interconnect network. The processor is configured to synchronously load a first data operand to each of the processing elements via the switch-based interconnect network and a second data operand to each of the processing elements via the non-switch-based interconnect network.