The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 01, 2015

Filed:

Jul. 30, 2008
Applicants:

Yau Ning Chin, Seattle, WA (US);

Rene Antonio Vega, Kirkland, WA (US);

John Te-jui Sheu, Redmond, WA (US);

Arun Kishan, Bellevue, WA (US);

Thomas Fahrig, Redmond, WA (US);

Inventors:

Yau Ning Chin, Seattle, WA (US);

Rene Antonio Vega, Kirkland, WA (US);

John Te-Jui Sheu, Redmond, WA (US);

Arun Kishan, Bellevue, WA (US);

Thomas Fahrig, Redmond, WA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2006.01); G06F 9/52 (2006.01);
U.S. Cl.
CPC ...
G06F 9/45533 (2013.01); G06F 9/45558 (2013.01); G06F 9/526 (2013.01);
Abstract

Various aspects are disclosed herein for attenuating spin waiting in a virtual machine environment comprising a plurality of virtual machines and virtual processors. Selected virtual processors can be given time slice extensions in order to prevent such virtual processors from becoming de-scheduled (and hence causing other virtual processors to have to spin wait). Selected virtual processors can also be expressly scheduled so that they can be given higher priority to resources, resulting in reduced spin waits for other virtual processors waiting on such selected virtual processors. Finally, various spin wait detection techniques can be incorporated into the time slice extension and express scheduling mechanisms, in order to identify potential and existing spin waiting scenarios.


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