Gate driving circuit for thin film transistor liquid crystal display and thin film transistor liquid crystal display

Abstract

A gate driving circuit and a display, the gate driving circuit comprises a plurality of shift register connected in cascade. The shift register comprises: a signal outputting circuit (), a signal inputting circuit (), an inverting circuit () and a logic circuit (). The signal outputting circuit () receives a forward direction clock signal from an external circuit and comprises a clock transistor and a level transistor. The signal outputting circuit outputs the forward direction clock signal when the clock transistor is turned on and outputs a constant-low level signal when the level transistor is turned on. The signal inputting circuit () receives an output signal from a previous shift register, and turns on the clock transistor when the received output signal of the previous shift register is valid. The inverting circuit () receives an inverse direction clock signal from the external circuit, turns off the clock transistor and turns on the level transistor at the same time when the inverse direction clock signal is valid. The logic circuit () holds the clock transistor as being turned on before the level transistor is turned on. The gate driving circuit has low power consumption, strong capability of anti-interference and a stable output wave.