The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2015

Filed:

Feb. 29, 2012
Applicants:

Hüseyin Kayahan, Istanbul, TR;

Yasar Gürbüz, Istanbul, TR;

Inventors:

Hüseyin Kayahan, Istanbul, TR;

Yasar Gürbüz, Istanbul, TR;

Assignee:

SABANCI ÜNIVERSITESI, Istanbul, TR;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04N 3/14 (2006.01); H04N 5/335 (2011.01); H01L 27/00 (2006.01); G01N 23/00 (2006.01); G21K 7/00 (2006.01); H04N 5/378 (2011.01); H04N 5/355 (2011.01); H04N 5/3745 (2011.01); H03M 1/14 (2006.01); H03M 1/60 (2006.01);
U.S. Cl.
CPC ...
H04N 5/378 (2013.01); H03M 1/144 (2013.01); H04N 5/355 (2013.01); H04N 5/37455 (2013.01); H03M 1/60 (2013.01);
Abstract

The present invention proposes a CMOS sensor pixel with a pulse frequency modulated digital readout integrated circuit (DROIC) comprising a photon sensitive element for receiving a plurality of photons and providing a charge signal indicative of the received photons, an integration capacitor connected to said photon sensitive element for determining a cumulative signal based on the charge signal for a certain integration time and producing an integrator output signal based on the cumulative signal and a comparator connected to the integrator for producing a comparator output signal. Each of said pixels further comprises a DAC that switches at each clock cycle following the end of an integration time and two counters respectively counting number of resets of said integration capacitor and voltage difference between an integrator output residue signal and a reference voltage of said comparator.


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