The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2015

Filed:

Feb. 19, 2014
Applicant:

Toyoda Gosei Co., Ltd., Kiyosu-Shi, JP;

Inventors:

Naoyuki Nakada, Kiyosu, JP;

Koji Okuno, Kiyosu, JP;

Yasuhisa Ushida, Kiyosu, JP;

Assignee:

TOYODA GOSEI CO., LTD., Kiyosu-Shi, Aichi-Ken, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/20 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 29/2003 (2013.01); H01L 21/0237 (2013.01); H01L 21/0242 (2013.01); H01L 21/0254 (2013.01); H01L 21/0262 (2013.01); H01L 21/02433 (2013.01); H01L 21/02458 (2013.01); H01L 21/02636 (2013.01); H01L 21/02639 (2013.01); H01L 21/02647 (2013.01);
Abstract

A semiconductor substrate includes a sapphire substrate including an a-plane main surface and a groove in a surface thereof, the groove includes side surfaces and a bottom surface, and a Group III nitride semiconductor layer formed on the sapphire substrate. Both side surfaces of the groove assume a c-plane of sapphire. An axis perpendicular to one of the side surfaces of the groove of the Group III nitride semiconductor layer assumes a c-axis of Group III nitride semiconductor. A plane parallel to the main surface of the sapphire substrate of the Group III nitride semiconductor layer assumes an m-plane of Group III nitride semiconductor.


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