The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 24, 2015
Filed:
Jan. 02, 2014
International Business Machines Corporation, Armonk, NY (US);
Douglas E. Sprague, Ellsworth, ME (US);
Philip S. Stevens, Williston, VT (US);
GLOBALFOUNDRIES Inc., Grand Cayman, KY;
Abstract
The present disclosure generally provides for a method of prioritizing clock domains for testing an integrated circuit (IC) design. The method can include: assigning each of a plurality of multi-tested clock domains (MTCDs) and a plurality of test experiments (TEs) to one of a plurality of speed priority groups (SPGs), wherein the assigning includes: creating a new SPG having a priority value of n+1, wherein n represents the number of previously created SPGs; assigning a first MTCD corresponding to at least two of the plurality of TEs, the first MTCD not being previously assigned to an SPG, to the new SPG; and assigning each TE corresponding to the first MTCD, each of the assigned TEs not being previously assigned to an SPG, to the new SPG; and performing each of the plurality of TEs on the IC design in order from lowest priority value to highest priority value.