The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 2015

Filed:

Apr. 13, 2012
Applicants:

Yoichi Kamisuki, Tokyo, JP;

Shinji Kondoh, Tokyo, JP;

Yasuji Fukasawa, Tokyo, JP;

Masanori Kawaguchi, Tokyo, JP;

Atsuto Hashimoto, Tokyo, JP;

Inventors:

Yoichi Kamisuki, Tokyo, JP;

Shinji Kondoh, Tokyo, JP;

Yasuji Fukasawa, Tokyo, JP;

Masanori Kawaguchi, Tokyo, JP;

Atsuto Hashimoto, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
C23C 16/00 (2006.01); C23C 16/50 (2006.01); C23F 1/00 (2006.01); H01L 21/306 (2006.01); C23C 16/32 (2006.01); C23C 16/458 (2006.01); C23C 16/44 (2006.01); C30B 25/02 (2006.01); C30B 25/12 (2006.01); C30B 29/36 (2006.01); C30B 35/00 (2006.01); H01L 21/673 (2006.01);
U.S. Cl.
CPC ...
C23C 16/325 (2013.01); C23C 16/4404 (2013.01); C23C 16/4581 (2013.01); C30B 25/02 (2013.01); C30B 25/12 (2013.01); C30B 29/36 (2013.01); C30B 35/00 (2013.01); H01L 21/67366 (2013.01);
Abstract

The present invention relates to: a jig for semiconductor production which is used for a CVD device in a semiconductor production process and contains a jig base and an SiC coating film formed on the jig base, in which the SiC coating film has a surface area ratio (surface area S/surface area S) between an apparent surface area Sas calculated on the assumption that the surface is flat and free from unevenness and an actual surface area S, of from 1.4 to 3.2; and a method for producing the jig for semiconductor production.


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