The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 2015

Filed:

Apr. 12, 2013
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventors:

Seiji Hayashi, Yokohama, JP;

Takuya Kondo, Chigasaki, JP;

Shoji Matsumoto, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/16 (2006.01); H05K 1/11 (2006.01); H05K 1/14 (2006.01); H05K 1/18 (2006.01); H05K 1/02 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0216 (2013.01); H01L 23/49827 (2013.01); H01L 23/49838 (2013.01); H05K 1/0298 (2013.01); H05K 1/11 (2013.01); H05K 1/114 (2013.01); H05K 1/116 (2013.01); H05K 1/14 (2013.01); H05K 1/162 (2013.01); H05K 1/18 (2013.01); H01L 2224/48227 (2013.01); H05K 1/0228 (2013.01); H05K 1/0242 (2013.01); H05K 2201/0939 (2013.01); H05K 2201/09418 (2013.01); H05K 2201/09454 (2013.01); H05K 2201/09463 (2013.01); H05K 2201/09636 (2013.01); H05K 2201/10378 (2013.01); H05K 2201/10674 (2013.01); H05K 2201/10734 (2013.01);
Abstract

First and second signal wiring patterns are formed in a first conductor layer. A first electrode pad electrically connected to the first signal wiring pattern through a first via and a second electrode pad electrically connected to the second signal wiring pattern through a second via are formed in a second conductor layer as a surface layer. A third conductor layer is disposed between the first conductor layer and the second conductor layer with an insulator interposed between those conductor layers. A first pad electrically connected to the first via is formed in the third conductor layer. The first pad includes an opposed portion which overlaps the second electrode pad as viewed in a direction perpendicular to the surface of a printed board and which is opposed to the second electrode pad through intermediation of the insulator. This enables reduction of crosstalk noise caused between the signal wirings.


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