The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2015
Filed:
Dec. 20, 2012
St-ericsson SA, Plan-les-Ouates, CH;
Kimmo Koli, Turku, FI;
ST-ERICSSON SA, Plan-les-Ouates, CH;
Abstract
A signal filter () comprises a first transferred impedance filter, TIF, (TIF) having four differential signal paths (P, P, P, P) and a second TIF (TIF) having four differential signal paths (P, P, P, P)- A first differential signal port of the first TIF () is coupled to a first differential signal port of the second TIF (). A first clock generator () is arranged to provide first-TIF clock signals (CLK, CLK, CLK, CLK) having four non-overlapping phases for selecting the respective first-TIF differential signal paths (P, P, P, P), and a second clock generator () is arranged to provide second-TIF clock signals (CLK, CLK, CLK, CLK) having four non-overlapping phases for selecting the respective second-TIF differential signal paths (P, P, P, P). The phases of the second-TIF clock signals (CLK, CLK, CLK, CLK) are equal to the phases of the first-TIF clock signals (CLK, CLK, CLK, CLK) delayed by 45 degrees. The first-TIF first, second, third and fourth clock signals (CLK, CLK, CLK, CLK) and the second-TIF first, second, third and fourth clock signals (CLK, CLK, CLK, CLK) have a duty cycle in the range 16.75% to 25%.