The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2015
Filed:
Oct. 11, 2013
Applicant:
SK Hynix Inc., Gyeonggi-do, KR;
Inventor:
Won-Seok Hwang, Gyeonggi-do, KR;
Assignee:
SK Hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/56 (2006.01); H03K 21/02 (2006.01); H04N 5/378 (2011.01); H03K 21/38 (2006.01); H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
H03K 21/026 (2013.01); H03K 21/38 (2013.01); H03M 1/123 (2013.01); H03M 1/56 (2013.01); H04N 5/378 (2013.01);
Abstract
A double data rate (DDR) counter includes a clock selection unit suitable for selectively inverting a first counting clock based on a control signal and for outputting a second counting clock, a first latch stage suitable for latching the second counting clock based on a counting enable signal and for outputting the least significant bit (LSB) of the DDR counter, a determination unit suitable for generating the control signal based on the last bit state of the LSB in a reset counting period, and a second latch stage suitable for receiving the LSB as a clock input to generate a higher bit of the LSB at least in a main counting period.