The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 2015

Filed:

Apr. 29, 2014
Applicant:

Hong Kong Applied Science & Technology Research Institute Company Limited, Hong Kong, HK;

Inventors:

Ho Ming (Karen) Wan, Hong Kong, HK;

Kwai Chi Chan, Hong Kong, HK;

Tin Ho (Andy) Wu, Hong Kong, HK;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/02 (2006.01); H03F 3/00 (2006.01); H03F 3/45 (2006.01); H03G 3/00 (2006.01);
U.S. Cl.
CPC ...
H03F 1/0233 (2013.01); H03F 3/005 (2013.01); H03F 3/45071 (2013.01); H03G 3/002 (2013.01); H03F 2200/249 (2013.01); H03F 2200/471 (2013.01); H03F 2203/45116 (2013.01);
Abstract

A Programmable-Gain Amplifier (PGA) has a digital value that programmably adjusts the gain of the analog amplifier. A variable capacitor has several switched sub-capacitors that are enabled by the digital value. Enabled sub-capacitors are switched between a sampled input and a virtual ground on one terminal, and connect to a summing node on the other terminal. The summing node connects to the inverting input of an op amp either through a switch or through a double-sampling capacitor that stores an offset. A feedback capacitor is in parallel with a sampling capacitor during a second clock phase when direct-charge transfer occurs, reducing power consumption of the amplifier. The feedback capacitor samples the sampled input during the first clock phase. The PGA gain is proportional to the sum of capacitances of enabled sub-capacitors. The gain can be adjusted for sensor inputs to an Analog Front-End (AFE), such as for an electro-cardiogram (ECG).


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