The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 2015

Filed:

Jul. 25, 2013
Applicant:

Gold Standard Simulations Ltd., Glasgow, GB;

Inventor:

Asen Asenov, Glasgow, GB;

Assignee:

Gold Standard Simulations Ltd., Glasgow, Scotland, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/49 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66477 (2013.01); H01L 29/1041 (2013.01); H01L 29/4983 (2013.01); H01L 29/66545 (2013.01); H01L 29/66621 (2013.01); H01L 29/66651 (2013.01); H01L 29/78 (2013.01); H01L 29/7833 (2013.01);
Abstract

The structure, and fabrication method thereof, implements a fully depleted silicon-on-insulator (SOI) transistor using a 'Channel Last' procedure in which the active channel is a low-temperature epitaxial layer in an etched recess in the SOI silicon film. A highly localized ion implantation is used to set the threshold voltage of the transistor and to improve the short channel behavior of the final device. Based on high-K metal gate technology, this transistor has reduced threshold uncertainty and superior source and drain conductance.


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