The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2015
Filed:
Jan. 31, 2014
Qualcomm Incorporated, San Diego, CA (US);
Xiangdong Chen, Irvine, CA (US);
Ohsang Kwon, San Diego, CA (US);
Satyanarayana Sahu, San Diego, CA (US);
Divya Gangadharan, San Diego, CA (US);
Chih-Iung Kao, San Diego, CA (US);
Renukprasad Shreedhar Hiremath, San Diego, CA (US);
Animesh Datta, San Diego, CA (US);
Qi Ye, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
A CMOS device including a standard cell includes first and second transistors with a gate between the first and second transistors. One active region extends between the first and second transistors and under the gate. In a first configuration, when drains/sources of the first and second transistors on the sides of the gate carry the same signal, the drains/sources are connected together and to the gate. In a second configuration, when a source of the first transistor on a side of the gate is connected to a source voltage and a drain/source of the second transistor on the other side of the gate carries a signal, the source of the first transistor is connected to the gate. In a third configuration, when sources of the first and second transistors on the sides of the gate are connected to a source voltage, the gate floats.