The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 2015

Filed:

Mar. 14, 2013
Applicants:

Jaehyeok Yang, Daejeon, KR;

Jinho Han, Daejeon, KR;

Byungkuk Yoon, Daejeon, KR;

Hyeonmin Bae, Seoul, KR;

Jinho Park, Yongin, KR;

Taeho Kim, Incheon, KR;

Inventors:

Jaehyeok Yang, Daejeon, KR;

Jinho Han, Daejeon, KR;

Byungkuk Yoon, Daejeon, KR;

Hyeonmin Bae, Seoul, KR;

Jinho Park, Yongin, KR;

Taeho Kim, Incheon, KR;

Assignee:

Terasquare Co. Ltd., Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01); G06F 11/00 (2006.01); G06F 1/08 (2006.01); H04L 25/14 (2006.01); H04L 7/00 (2006.01); G06F 13/40 (2006.01); G06F 13/38 (2006.01); G06F 17/30 (2006.01); G06F 15/17 (2006.01);
U.S. Cl.
CPC ...
G06F 1/08 (2013.01); G06F 13/385 (2013.01); G06F 13/405 (2013.01); G06F 15/17 (2013.01); G06F 17/30017 (2013.01); H04L 7/0008 (2013.01); H04L 7/0012 (2013.01); H04L 25/14 (2013.01);
Abstract

Disclosed are various exemplary embodiments of a clock recovery apparatus for recovering clock signals of multiple data channels. In one exemplary embodiment a clock recovery apparatus for a plurality of data channels may include a plurality of channel blocks, where each channel block may include a frequency detection block configured to generate an intermediate signal based on a respective data signal received from a respective data channel and a global signal, and a recovery block configured to recover a clock signal for the respective data channel in response to the respective data signal and the global signal. The apparatus may also include a global signal generation block configured to receive and combine the intermediate signals from the plurality of channel blocks to generate the global signal.


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