The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 2015
Filed:
Jun. 06, 2014
Applicant:
Northwestern University, Evanston, IL (US);
Inventors:
Joseph S. Friedman, Rochester, NY (US);
Bruce W. Wessels, Wilmette, IL (US);
Alan V. Sahakian, Northbrook, IL (US);
Assignee:
NORTHWESTERN UNIVERSITY, Evanston, IL (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/173 (2006.01); A61B 5/1459 (2006.01); A61B 5/1473 (2006.01); A61B 17/00 (2006.01); A61B 19/00 (2006.01); G01N 21/25 (2006.01); G01J 3/02 (2006.01);
U.S. Cl.
CPC ...
A61B 5/1459 (2013.01); A61B 5/1473 (2013.01); A61B 17/00234 (2013.01); A61B 19/2203 (2013.01); G01N 21/255 (2013.01); H03K 19/1735 (2013.01); A61B 2019/2215 (2013.01); G01J 3/0224 (2013.01); G01N 2201/06113 (2013.01);
Abstract
Systems and methods can perform automatic computation developed using carbon nanotubes and graphene nanoribbons and/or InSb p-n bilayer channel avalanche diodes and wires. Spin logic can provide improvements in speed, power, and area, promising to be a high-performance logic family for the next generation of computing. The systems and methods can replace CMOS, for example, for general computing applications.