The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2015

Filed:

Aug. 27, 2013
Applicant:

Megachips Corporation, Osaka-shi, JP;

Inventors:

Masayuki Yoshiyama, Chiba, JP;

Hideyuki Sato, Koto-ku, JP;

Assignee:

MegaChips Corporation, Osaka-shi, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04B 10/60 (2013.01); H04B 10/272 (2013.01); H04B 10/69 (2013.01); H04L 7/033 (2006.01);
U.S. Cl.
CPC ...
H04B 10/60 (2013.01); H04B 10/272 (2013.01); H04B 10/69 (2013.01); H04L 7/0337 (2013.01);
Abstract

A first phase setting circuit generates a first phase setting signal. A first synchronous signal generator generates a first synchronous clock signal having a phase set by the first phase setting signal from a multi-phase local clock signal. By removing a phase fluctuation component representing phase fluctuation of the reception data signal from a first signal including a frequency component representing a frequency offset between a multi-phase local clock signal and a reception data signal and the phase fluctuation component, a second generation unit generates a second signal including the frequency component. The first phase setting circuit updates the first phase setting signal according to the second signal.


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