The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 2015

Filed:

Mar. 15, 2013
Applicant:

Cirrus Logic, Inc., Austin, TX (US);

Inventors:

Mohit Sood, Austin, TX (US);

Spencer Isaacson, Austin, TX (US);

Rahul Singh, Austin, TX (US);

Zhaohui He, Austin, TX (US);

Assignee:

Other;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H05B 37/02 (2006.01); H05B 39/04 (2006.01); H05B 41/36 (2006.01); H02M 3/335 (2006.01); H03K 17/14 (2006.01); H05B 33/08 (2006.01);
U.S. Cl.
CPC ...
H02M 3/33523 (2013.01); H03K 17/145 (2013.01); H05B 33/0815 (2013.01); H05B 33/0848 (2013.01); H05B 33/0884 (2013.01); Y02B 20/341 (2013.01); Y10T 307/406 (2015.04); Y10T 307/832 (2015.04);
Abstract

A system and method include a controller that reduces power dissipated by a switch, such as a source-controlled field effect transistor, when an estimated amount of power dissipated by the switch exceeds a predetermined threshold. Reducing the power dissipated by the switch prevents damage to the switch due to overheating. The controller determines the estimated amount of power dissipated by the switch using actual drain-to-source current and drain voltage data. In at least one embodiment, the controller includes a fail-safe, estimated power dissipation determination path that activates when the drain voltage data fails a reliability test. Additionally, in at least one embodiment, the controller includes a model of thermal characteristics of the switch. In at least one embodiment, the controller utilizes real-time estimated power dissipation by the switch and the model to determine when the estimated power dissipated by the switch exceeds a power dissipation protection threshold.


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