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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9184274 B1

PDFFull Text
Date of Patent:
Nov. 10, 2015

Filed:

Feb. 07, 2013

Semiconductor apparatus and manufacturing method of the semiconductor apparatus

Applicant:

Sony Corporation, Tokyo, JP;

Inventors:

Katsuhiko Takeuchi, Kanagawa, JP;

Satoshi Taniguchi, Kanagawa, JP;

Assignee:

SONY CORPORATION, Tokyo, JP;

Attorney:

Dentons US LLP

Primary Examiner:

Daniel Shook

Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 21/336 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 29/201 (2006.01); H01L 29/423 (2006.01); H01L 29/51 (2006.01); H01L 29/10 (2006.01); H01L 29/205 (2006.01); H01L 29/207 (2006.01); H01L 29/43 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7783 (2013.01); H01L 21/0228 (2013.01); H01L 21/02543 (2013.01); H01L 21/02546 (2013.01); H01L 29/201 (2013.01); H01L 29/66462 (2013.01); H01L 29/7785 (2013.01); H01L 29/0847 (2013.01); H01L 29/1066 (2013.01); H01L 29/205 (2013.01); H01L 29/207 (2013.01); H01L 29/4236 (2013.01); H01L 29/42376 (2013.01); H01L 29/432 (2013.01); H01L 29/517 (2013.01);
Abstract

Provided is a semiconductor apparatus including a channel layer, an upper barrier layer that is provided on the channel layer, a first barrier layer that constitutes a boundary layer on a side of the channel layer in the upper barrier layer, a second barrier layer that is provided in a surface layer of the upper barrier layer, a low-resistance region that is provided in at least a surface layer in the second barrier layer, a source electrode and a drain electrode that are connected to the second barrier layer, at positions across the low-resistance region, a gate insulating film that is provided on the low-resistance region, and a gate electrode that is provided above the low-resistance region via the gate insulating film.

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