The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2015

Filed:

Jun. 30, 2008
Applicants:

Vaibhav Dinesh, Dehli, IN;

Kunal Raheja, Noida, IN;

Patrick Duvaut, Tinton Falls, NJ (US);

Inventors:

Vaibhav Dinesh, Dehli, IN;

Kunal Raheja, Noida, IN;

Patrick Duvaut, Tinton Falls, NJ (US);

Assignee:

IKANOS COMMUNICATIONS, INC., Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04M 3/08 (2006.01); H04M 3/30 (2006.01); H04B 3/46 (2015.01);
U.S. Cl.
CPC ...
H04M 3/306 (2013.01); H04B 3/46 (2013.01);
Abstract

Systems and methods for characterizing loops based on frequency domain reflectometry single-ended line testing (FDR-SELT) are described. One embodiment includes a method for determining whether a straight-loop departure condition exists on a loop under test. First, an un-calibrated echo signal is received. A region associated with the loop under test, a platform type, and estimated the length of the loop under test are then used together with the received un-calibrated echo signal to determine whether the loop is not a straight loop is determined through determining whether at least one differentiating feature is present in the received signal. Another embodiment includes a method for determining a loop gauge for a loop under test through analyzing characteristics relating to local maxima and local minima of the received un-calibrated echo signal using the region, platform type, and the estimated loop length.


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