The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2015

Filed:

Sep. 22, 2014
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Sang Min Lee, San Diego, CA (US);

Dongwon Seo, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 (2006.01); H03M 1/08 (2006.01); H03M 1/68 (2006.01); H03M 1/78 (2006.01);
U.S. Cl.
CPC ...
H03M 1/0881 (2013.01); H03M 1/687 (2013.01); H03M 1/785 (2013.01);
Abstract

The apparatus may be an N-bit DAC including (2−1) parallel stages associated with M most significant bits, and (N-M) stages associated with (N-M) least significant bits. The (2−1) parallel stages may deliver a first current to current-summing nodes of the DAC. The (N-M) stages may include a resistive network and a second pair of switches, and may deliver a second current to the resistive network of the stage. Each resistive network may scale the respectively delivered currents according to a binary weight of a stage corresponding to the resistive network, and may deliver the scaled currents to the pair of current-summing nodes. At least one of the (N-M) stages may be separated from the remaining stages.


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