The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 03, 2015
Filed:
Feb. 27, 2014
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Mahadevan Venkiteswaran, Bangalore, IN;
Rajavelu Thinakaran, Bangalore, IN;
Assignee:
TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/38 (2006.01); H03K 3/356 (2006.01);
U.S. Cl.
CPC ...
H03K 3/356165 (2013.01); H03M 1/38 (2013.01);
Abstract
A low-power offset-stored CMOS latch includes, for example, a common current source that is arranged to provide a predetermined bias current for an offset storage phase and enable transistors that are arranged to couple a resolution bias current during a resolution period to a respective input pair device. The low-power offset-stored CMOS latch optionally includes current scaling to provide a resolution bias current that is larger than the predetermined bias current of the offset storage phase.