The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 03, 2015
Filed:
Sep. 20, 2011
Chiao-ling Lung, Hsinchu County, TW;
Yu-shih Su, Yunlin County, TW;
Shih-chieh Chang, Hsinchu, TW;
Yiyu Shi, Rolla, MO (US);
Chiao-Ling Lung, Hsinchu County, TW;
Yu-Shih Su, Yunlin County, TW;
Shih-Chieh Chang, Hsinchu, TW;
Yiyu Shi, Rolla, MO (US);
Industrial Technology Research Institute, Hsinchu, TW;
Abstract
A fault-tolerant unit and a fault-tolerant method for through-silicon via (TSV) are provided. The fault-tolerant unit includes TSV structures TSV˜TSVn, nodes N˜N, nodes N˜Nand a switching module. The TSV structure TSVi is connected between the node Nof the first chip and the node Nof the second chip, wherein 1≦i≦n. The switching module is connected between the nodes N˜Nof the second chip and a test path of the second chip. In normal operation state, the switching module disconnects the test path and the nodes N˜Nwhen the TSV structures TSV˜TSVn are valid. The switching module connects the node Nto at least another one of the nodes N˜Nwhen the TSV structure TSVi is faulty in the normal operation state. In test status, the switching module connects the test path to the nodes N˜N.