The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 03, 2015
Filed:
Dec. 27, 2013
Applicant:
Kabushiki Kaisha Toshiba, Minato-ku, JP;
Inventors:
Tokumasa Hara, Kawasaki, JP;
Naoya Tokiwa, Fujisawa, JP;
Hiroshi Sukegawa, Tokyo, JP;
Hitoshi Iwai, Kamakura, JP;
Toshifumi Shano, Fujisawa, JP;
Shirou Fujita, Kamakura, JP;
Assignee:
KABUSHIKI KAISHA TOSHIBA, Minato-ku, JP;
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 16/26 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
G11C 16/26 (2013.01); G11C 16/0483 (2013.01);
Abstract
According to one embodiment, a semiconductor memory device reads data in units of page. The device includes: a memory cell array; a plurality of latch circuits; and an arithmetic operation circuit. The memory cell array holds data multiplexed in at least three pages. The latch circuits read and hold the multiplexed data at a startup. The arithmetic operation circuit performs operations by use of the multiplexed data.