The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2015

Filed:

Oct. 24, 2012
Applicant:

Sandisk Technologies Inc., Plano, TX (US);

Inventors:

Michael Ming-Chang Liu, Union City, CA (US);

Darmin Jin, Fremont, CA (US);

Assignee:

SanDisk Technologies Inc., Plano, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/42 (2006.01); G06F 1/08 (2006.01); G06F 1/12 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4295 (2013.01); G06F 1/08 (2013.01); G06F 1/12 (2013.01);
Abstract

Multi-level encoded data transfer is disclosed. 2bits may be encoded in a data signal each half clock cycle. For example, four bits may be transferred each clock cycle. Prior to data transfer, each data line may have two bits ready to be encoded. The two bits may be encoded to one of four different data states. The clock may be divided into four intervals for each half clock cycle, with each interval corresponding to one of the four data states. The two bits may be encoded into the data signal based on the interval that corresponds to the data state. As one example, the data signal could transition during the interval that corresponds to the data state for the two bits. This encoding may be repeated for two other bits for the other half of the clock cycle. Thus, QDR or some other data rate may be achieved.


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