The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 03, 2015
Filed:
Feb. 25, 2013
Gary L. Miller, Austin, TX (US);
Gary L. Miller, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
Methods and systems are disclosed for address mapping between die-to-die-port (DTDP) host devices and DTDP expansion devices for combined system-in-package (SiP) solutions. Interconnect circuitry having a plurality of ports is configured to provide communication from the host device to the expansion device so that the expansion device appears to be resident on the host device. Configurable address mapping is used to re-configure the host memory map to include expansion memory map details in a seamless fashion. Further, direct circuit interconnection blocks (e.g., using copper pillar (CuP) connectors) can be used to improve connectivity and performance.