The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 2015

Filed:

Jan. 23, 2012
Applicants:

Jamie R. Kuesel, Rochester, MN (US);

Mark G. Kupferschmidt, Rochester, MN (US);

Paul E. Schardt, Rochester, MN (US);

Robert A. Shearer, Iii, Rochester, MN (US);

Inventors:

Jamie R. Kuesel, Rochester, MN (US);

Mark G. Kupferschmidt, Rochester, MN (US);

Paul E. Schardt, Rochester, MN (US);

Robert A. Shearer, III, Rochester, MN (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01); G06F 12/08 (2006.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0888 (2013.01); G06F 13/28 (2013.01);
Abstract

A circuit arrangement and method utilize cache injection logic to perform a cache inject and lock operation to inject a cache line in a cache memory and automatically lock the cache line in the cache memory in parallel with communication of the cache line to a main memory. The cache injection logic may additionally limit the maximum number of locked cache lines that may be stored in the cache memory, e.g., by aborting a cache inject and lock operation, injecting the cache line without locking, or unlocking and/or evicting another cache line in the cache memory.


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