The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9171928 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 27, 2015

Filed:

Nov. 26, 2013
Applicant:

Renesas Electronics Corporation, Kawasaki-shi, Kanagawa, JP;

Inventors:

Tamotsu Ogata, Kawasaki, JP;

Toshifumi Iwasaki, Kawasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/6656 (2013.01); H01L 21/823418 (2013.01); H01L 21/823425 (2013.01); H01L 21/823814 (2013.01); H01L 29/665 (2013.01); H01L 29/6653 (2013.01); H01L 29/6659 (2013.01); H01L 29/7833 (2013.01); H01L 21/823475 (2013.01);
Abstract

Provided is a semiconductor device with improved performance and production yield. Insulating films ILand ILare formed over a semiconductor substrate in that order to cover a gate electrode. Then, the insulating films ILand ILare etched back to form sidewall spacers including the insulating films ILand ILover sidewalls of the gate electrode. The source/drain region is formed in the semiconductor substrate by ion implantation using the gate electrode and the sidewall spacer as a mask. Then, the sidewall spacers are isotropically etched on conditions where the insulating film ILis less likely to be etched than the third insulating film ILto thereby decrease the thickness of the sidewall spacer. Thereafter, a reaction layer between the metal and the source/drain region is formed over the source/drain region.


Find Patent Forward Citations

Ogata, Tamotsu. (2015). Manufacturing method of semiconductor device (U.S. Patent No. 9171928). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9171928

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