The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2015

Filed:

Feb. 22, 2011
Applicants:

Hiroyuki Kanaya, Yokohama, JP;

Yukinori Koyama, Yokohama, JP;

Susumu Shuto, Yokohama, JP;

Kuniaki Sugiura, Fujisawa, JP;

Inventors:

Hiroyuki Kanaya, Yokohama, JP;

Yukinori Koyama, Yokohama, JP;

Susumu Shuto, Yokohama, JP;

Kuniaki Sugiura, Fujisawa, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/82 (2006.01); H01L 27/22 (2006.01); H01L 21/768 (2006.01); H01L 43/12 (2006.01);
U.S. Cl.
CPC ...
H01L 27/228 (2013.01); H01L 21/76897 (2013.01); H01L 43/12 (2013.01);
Abstract

A semiconductor memory device according to embodiments includes a semiconductor substrate and plural switching transistors provided on the semiconductor substrate. In the semiconductor memory device, a contact plug is embedded between adjacent two of the switching transistors, and is insulated from gates of the adjacent two switching transistors. The contact plug is also electrically connected to a source or a drain of each of the adjacent two switching transistors, and an upper surface of the contact plug is at a position higher than an upper surface of the switching transistors. A memory element is provided on the upper surface of the contact plug and stores data. A wiring is provided on the memory element.


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