The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2015

Filed:

Dec. 19, 2013
Applicant:

Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-Do, KR;

Inventors:

Jang-Hee Lee, Yongin-si, KR;

Jongmin Baek, Suwon-si, KR;

Kyu-Hee Han, Hwaseong-si, KR;

Gilheyun Choi, Seoul, KR;

Jongwon Hong, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/764 (2006.01); H01L 23/482 (2006.01); H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 23/28 (2006.01);
U.S. Cl.
CPC ...
H01L 23/4821 (2013.01); H01L 21/764 (2013.01); H01L 21/7682 (2013.01); H01L 21/76834 (2013.01); H01L 23/28 (2013.01); H01L 23/48 (2013.01); H01L 23/5222 (2013.01); H01L 2924/0002 (2013.01);
Abstract

Semiconductor devices, and methods of fabricating the same, include first conductive lines on a substrate, and a first molding layer covering the first conductive lines. The first conductive lines have air gaps between adjacent first conductive lines. Sidewalls of the first conductive lines and a bottom surface of the first molding layer collectively define a first gap region of each of the air gaps. The sidewalls of the first conductive lines and a top surface of the first molding layer collectively define a second air gap region of each of the air gaps.


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