The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2015

Filed:

Mar. 15, 2013
Applicant:

Kabushiki Kaisha Toshiba, Minato-ku, Tokyo, JP;

Inventors:

Yoshihiko Kamata, Yokohama, JP;

Yuko Yokota, Kamakura, JP;

Koji Tabata, Yokohama, JP;

Tomoyuki Hamano, Yokohama, JP;

Mario Sako, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/26 (2006.01); G11C 16/24 (2006.01); G11C 16/30 (2006.01);
U.S. Cl.
CPC ...
G11C 16/26 (2013.01); G11C 16/0483 (2013.01); G11C 16/24 (2013.01); G11C 16/30 (2013.01);
Abstract

According to one embodiment, a semiconductor memory device includes a first transistor, a detector, and a second transistor. The first transistor is capable of transferring a first voltage to a bit line. The detector reads data held by a memory cell connected to the bit line. The second transistor is capable of transferring a second voltage and a third voltage to the detector. The second voltage is generated by a source different from a source of the first voltage. The third voltage is larger than the second voltage. The second transistor charges the detector to one of the second voltage and the third voltage, while the first transistor transferring the first voltage to the bit line.


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