The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 27, 2015

Filed:

May. 16, 2013
Applicant:

Fairchild Semiconductor Corporation, San Jose, CA (US);

Inventor:

Peter Capofreddi, Pine Grove Mills, PA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/565 (2006.01); G05F 1/575 (2006.01);
U.S. Cl.
CPC ...
G05F 1/565 (2013.01); G05F 1/575 (2013.01);
Abstract

Devices and methods are provided for generating a regulated output voltage with improved line rejection based on an input voltage and a reference voltage. The device may include a pass transistor and a replica transistor, wherein source ports of the pass transistor and the replica transistor are coupled to the input voltage, a drain port of the pass transistor is coupled to the output voltage, and a gate port of the pass transistor is coupled to a gate port of the replica transistor. The device may further include a coupling circuit configured to couple current from the drain port of the replica transistor to the gate port of the replica transistor, the coupling circuit further configured to control voltage on the drain port of the replica transistor based on the reference voltage.


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