The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2015

Filed:

Jan. 28, 2014
Applicant:

Generalplus Technology Inc., Hsinchu City, TW;

Inventors:

Shih-Ming Luo, Taichung, TW;

Min Lu, Shanghai, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/0231 (2006.01); H03K 4/501 (2006.01); H03K 3/03 (2006.01);
U.S. Cl.
CPC ...
H03K 3/0231 (2013.01); H03K 3/03 (2013.01); H03K 4/501 (2013.01);
Abstract

A relaxation oscillator is provided in the present invention. The relaxation oscillator includes a R-S latch, a first delay circuit and a second delay circuit. The input terminal of the first delay circuit is coupled to the Q output terminal of the R-S latch, and the output terminal of the first delay circuit is coupled to the reset terminal of the R-S latch. The input terminal of the second delay circuit is coupled to the inversion Q output terminal of the R-S latch, and the output terminal of the second delay circuit is coupled to the set terminal of the R-S latch. When the input terminal of the first delay circuit inputs a first logic voltage, after a delay time, the output terminal of the first delay circuit outputs a second logic pulse. When the input terminal of the second delay circuit inputs the first logic voltage, after the delay time, the output terminal of the second delay circuit outputs the second logic pulse.


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