The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 2015
Filed:
May. 09, 2014
Fuji Electric Co., Ltd., Kanagawa, JP;
Toshihito Kamei, Saitama, JP;
Seiji Noguchi, Nagano, JP;
FUJI ELECTRIC CO., LTD., Kanagawa, JP;
Abstract
When forming a p+ area and n+ area on the same surface of an n− semiconductor wafer, a first ion implantation forms the p+ area on the entire rear surface of the n− semiconductor wafer. Next, a resist mask selectively covering the rear surface of the n− semiconductor wafer is formed. With this resist mask as the mask, an n-type impurity is injected into the rear surface of the n− semiconductor wafer through a second ion implantation to form the n+ area on a portion deeper from the rear surface of the n− semiconductor wafer than the p+ type area. Thereafter, the n− semiconductor wafer is exposed to an oxygen (O) gas atmosphere with fluorine (F) gas added to remove the resist mask and a silicon part between the rear surface of the n− semiconductor wafer in an FWD area not covered by the resist mask and the n+ area.