The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2015

Filed:

Feb. 22, 2011
Applicants:

Andreas Jakob, Starnberg, DE;

Thomas Kaiser, Munich, DE;

Inventors:

Andreas Jakob, Starnberg, DE;

Thomas Kaiser, Munich, DE;

Assignee:

Interposers GMBH, Munich, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 25/065 (2006.01); H01L 25/00 (2006.01); H01L 21/48 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 21/4867 (2013.01); H01L 23/538 (2013.01); H01L 2224/48463 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06527 (2013.01); H01L 2225/06568 (2013.01); H01L 2225/06572 (2013.01); H01L 2924/1461 (2013.01);
Abstract

In a method for producing a semi-conductor module () comprising at least two semi-conductor chips () and an interposer () which has electrically conductive structures () connecting the semi-conductor chips () to one another, the interposer () is printed directly onto a first () of the semi-conductor chips. When the interposer () is printed on, the electrically conductive structures () are produced by means of electrically conductive ink (). The second semi-conductor chip () is mounted on the interposer () such that the two semi-conductor chips () are arranged one above the other and that the interposer () forms an intermediate layer between the two semi-conductor chips ().


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