The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2015

Filed:

Aug. 07, 2014
Applicant:

Electronics and Telecommunications Research Institute, Daejeon, KR;

Inventors:

Hae Cheon Kim, Daejeon, KR;

Ho Kyun Ahn, Daejeon, KR;

Byoung Gue Min, Sejong, KR;

Hyung Sup Yoon, Daejeon, KR;

Jong Won Lim, Daejeon, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/00 (2010.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/05 (2013.01); H01L 24/03 (2013.01); H01L 2224/03848 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05084 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05144 (2013.01); H01L 2224/05155 (2013.01); H01L 2224/05166 (2013.01); H01L 2924/1033 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/201 (2013.01);
Abstract

The present invention relates to a GaN transistor, and a method of fabricating the same, in which a structure of a bonding pad is improved by forming an ohmic metal layer at edges of the bonding pad of a source, a drain, and a gate so as to be appropriate to wire-bonding or a back-side via-hole forming process. Accordingly, adhesive force between a metal layer of the bonding pad and a GaN substrate is enhanced by forming the ohmic metal at the edges of the bonding pad during manufacturing of the GaN transistor, thereby minimizing a separation phenomenon of a pad layer during the wire-bonding or back-side via-hole forming process, and improving reliability of a device.


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