The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2015

Filed:

Dec. 09, 2010
Applicants:

Gin Ghee Tan, Penang, MY;

Lai Beng Teoh, Penang, MY;

Lay Hong Lee, Penang, MY;

Inventors:

Gin Ghee Tan, Penang, MY;

Lai Beng Teoh, Penang, MY;

Lay Hong Lee, Penang, MY;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 21/563 (2013.01); H01L 21/568 (2013.01); H01L 23/3107 (2013.01); H01L 24/16 (2013.01); H01L 2224/13144 (2013.01); H01L 2224/16245 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/48257 (2013.01); H01L 2224/48465 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/00013 (2013.01);
Abstract

A method for manufacturing a semiconductor device is disclosed. In one embodiment a semiconductor die is formed overlying a substrate. The semiconductor die is flip chip mounted to the substrate, wherein the substrate comprises a plurality of conductive traces. The semiconductor die and substrate are encapsulated with an encapsulating material. A top side of the encapsulating material is subjected to one of polishing, etching, and grinding to expose a top side of the semiconductor die. Finally, the bottom side of the substrate is subjected to one of polishing, etching, and grinding to remove the substrate and to reduce a thickness of the plurality of conductive traces.


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