The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 20, 2015

Filed:

Jan. 22, 2013
Applicant:

Panasonic Corporation, Osaka, JP;

Inventors:

Takashi Muroyama, Nara, JP;

Miho Tokieda, Kyoto, JP;

Shinichi Takada, Osaka, JP;

Koji Yamada, Shiga, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/406 (2006.01); G06F 1/32 (2006.01);
U.S. Cl.
CPC ...
G11C 11/40618 (2013.01); G06F 1/3225 (2013.01); G06F 1/3275 (2013.01); Y02B 60/1225 (2013.01); Y02B 60/1228 (2013.01);
Abstract

A memory management unit manages a state of a memory which is to be accessed by bank interleaving. The memory includes p banks (where p is an integer of 2 or greater). The memory management unit includes a control unit that dynamically determines a bank to be accessed from among the p banks. When predetermined conditions for a reserving state of the memory are satisfied and there is any unused bank in the p banks, the control unit performs power consumption reduction to control the memory to cause power consumption of the unused bank(s) to be less than power consumption of other banks in the p banks except the unused bank(s).


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